RISC-V Days Tokyo is the largest physical and online RISC-V event held in Japan. The purpose of RISC-V Days Tokyo is to bring together the leading RISC-V technologies and products, key persons and engineers in the industry, and to provide opportunities for product recognition, collaboration among companies, technology exchange and information gathering. Participants will have the chance to explore the latest RISC-V products and technologies, network with key industry figures, and learn about the latest developments in RISC-V technology. Overall, RISC-V Days Tokyo promises to be an exciting opportunity for anyone interested in RISC-V technology.
Our student Zhu Yifei gave a talk “GreenRio: A modern RISC-V microprocessor designed entirely in an agile open source EDA flow” at the RISC-V Days Tokyo. The booming RISC-V and open-source EDA ecosystem lower the threshold for CPU design. To facilitate a reliable chip manufacturing flow and prepare for future agile development, our students constructed a full-stack design methodology for modern processors in an open-source mode based on our experience in the efabless MPW-7 shuttle. We developed a 64-bit dual-issue, out-of-order RISC-V microprocessor “GreenRio”, and completed the back-end process of “RTL-Verification-GDS-Signoff” purely depending on the open-source EDA toolchain. we will share our experience and provide a complete set of tape-out strategy for modern RISCV processors from ASIC front-end to back-end. We will also propose some innovations and adaptations based on existing open resources. Moreover, we will compare commercial and open-source EDA tools from a modern processor design perspective, with the limitations and future optimizations of the open-source tool summarized.
Recently, the “RISC 40th Anniversary Exhibition” was officially opened in Shenzhen Industrial Exhibition Hall. It was jointly held by the Municipal Industrial Exhibition Hall, the RISC-V International Open-Source Laboratory of Qinghua-Berkeley, Silicon Valley Computer History Museum and other units. Zheng Hongbo, member of the Standing Committee of Shenzhen Municipal Committee and the Party Leading Group of Shenzhen Municipal Government; Zhang Lin, Vice Minister of the Organization Department of Shenzhen Municipal Committee; Yu Xiquan, Secretary of the Party Leading Group and Director of the Municipal Bureau of Industry and Information Technology; Zheng Xuan, first-level researcher; Li Huilai, Deputy director of the Municipal Science and Technology Innovation Committee; Li Zexiang, Professor of the Department of Electronic and Computer Engineering of Hong Kong University of Science and Technology and founder of Shenzhen Institute of Science and Technology; Gao Hong, Vice Provost of Tsinghua University, Executive Dean of Tsinghua University Shenzhen International Graduate School and other guests attended the opening ceremony.
Yu Xiquan, secretary of the Party Group and director of the Municipal Bureau of Industry and Information Technology, said in his speech that RISC 40th anniversary exhibition showed the open-source concept of RISC in an all-round way by reviewing the development course of RISC for 40 years, and embodied the spirit of seeking truth, being innovative and pursuing excellence of the industry. With the global popularity of RISC-V, this open source and streamlined instruction set will bring more opportunities for source innovation, technological innovation, achievement transformation and enterprise cultivation to the chip field, and infuse new vitality into the chip industry.
David Patterson, Director of RIOS Laboratory, delivered a speech online. David Patterson said that although the chip and computer industry has been deeply internationalized, there is still pressure for global cooperation. He hoped that open source could bring the world together and find areas of cooperation, so as to help everyone in the world.
Gao Hong, vice provost of Tsinghua University and executive dean of Tsinghua University Shenzhen International Graduate School, mentioned at the opening ceremony that for enterprises, RISC-V open-source system can reduce the threshold of architecture authorization and save the cost of chip research and development. It is a new choice to solve key problems in the field of computer chip design, and also a new breakthrough with bright prospects. It is hoped that the public can come to the scene to see the development process and application status of RISC reduced instruction set computer, to further enhance the attention and awareness of the chip industry, and hope that this activity can inspire more aspiring young people to devote themselves to RISC technology and chip industry.
After the open ceremony, the guests visited the “RISC 40th Anniversary Exhibition”. The exhibition reviews the origin, foundation, core, invention, and creation of the development of the global electronics computer industry and echoes the innovation and application of the development of electronics and computer industry in China, integrating the four decades of innovation and entrepreneurship stories from coast to coast. This exhibition aims to build a platform for chip technology exchange and exhibition, stimulate innovation, deepen cooperation, form the driving force for the development of RISC-V open-source chip, promote the development of the entire chip industry with the source innovation of chip design, promote the linking innovation of the whole chain, and build an open and win-win open-source chip design ecosystem.
At the same time, the Industrial Culture research class of Shenzhen Industrial Exhibition Hall was opened, which will be held every weekend for two months, showing students the development history of RISC and Shenzhen’s industrial construction achievements in the semiconductor field. It is hoped that through normal research activities, teenagers’ interest in chip industry and even manufacturing industry can be cultivated, and the seeds of intelligent manufacturing in China can be planted in the growth of young people.
The show is open and inclusive.
A tiny nanoscale chip can reveal its intricate internal structure to everyone.
Just like RISC-V’s open-source ecosystem provides a more innovative and free sense of use to all users.
David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1976.
Dave’s research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion dollar industries.
A measure of the success of projects is the list of awards won by Patterson and as his teammates: the ACM A.M. Turing Award, the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 40 awards for research, teaching, and service.
In his spare time he coauthored seven books—including two with John Hennessy who is past President of Stanford University and with whom he shared the Turing Award— Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM. He is currently Vice-Chair of the Board of Directors of the RISC-V Foundation.
